Abstract
Carry-free parallel arithmetic computing using redundant binary number representation is exploited. Based on the original two-step algorithm, several improved algorithms including modified two-step, one-step, canonical, and three-input algorithms are proposed to increase processing speed and simplify the implementation system. The symbolic substitution rules for redundant binary addition are represented by binary logic operations and realized using optical space-variant binary logic gates. The proposed optical architecture is suitable for realizing both binary logic and arithmetic operations. ©