Abstract
A processor-in-memory (PIM) computer architecture is any design that performs some subset of logical operations in the same location as memory. The traditional model of computing involves a processor loading data from memory to perform operations, with a bus connecting the processor and memory. While this technique works well in many situations, a growing gap between memory performance and processor performance has led some researchers to develop alternative architectures. This thesis includes a discussion of what is a PIM architecture, as well as motivations, applications, and limitations of PIM. After providing background information on the subject, a Field Programmable Gate Array (FPGA) implementation of a PIM enhanced microcontroller is presented. Using an Artix-7 FPGA, an ATmega103 microcontroller soft core is modified to include a PIM core as an accelerator. The sample application of AES encryption provides a comparison between the baseline processor and the PIM enhanced machine.